Instrumentation Technique for FPGA based Fault Injection Tool

This paper presents an overview about FPGA based fault injection tools which are developed by using the instrumentation technique or modification in the original code. The fault injection technique is used to evaluate dependability parameters of computer based embedded systems or safety critical systems, by injecting faults in a system. An observation on the behaviour or of the response for both -fault free and faulty systemsis made and the results are matched. In the instrumentation based technique, faults are injected by adding some additional circuits in the target system known as fault models. Different fault models are explained in this paper, e.g. Stuck at 0/1, Bit flip, Mutant and Saboteur. A variety of FPGA based tools are discussed and a new FPGA based fault injection technique is introduced. The tool that has been developed according to our methodology can work on any simple or complex digital circuits or SoC realized on FPGA. This can be exercised to evaluate the dependability parameters for the target systems under test e.g. fault coverage, fault latency and reliability. Key-Words: FPGA, Fault Injection, FPGA based fault injection tools, Instrumentation, Fault models, Fault coverage